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Inhalt ....................: ICs Digital, Bipolar TTL Serie 74H IEEE/DIN
Design-DatenBank ..........: d74h.ddb (28 KB; aktualisiert 26. May 2006)
Logische Bibliothek .......: d74h.def (9 KB; aktualisiert 27. September 2006)
ZIP-Datei .................: d74h.zip (8 KB; aktualisiert 15. December 2006)
PDF-Datei .................: d74h.pdf (17 KB; aktualisiert 06. December 2007)
Schaltplanblätter .........: 0
SCM-Symbole ...............: 25
SCM-Labels ................: 0
SCM-Marker ................: 3
Layouts ...................: 0
Layout-Bauteile/Gehäuse ...: 0
Layout-Padstacks ..........: 0
Layout-Pads ...............: 0
Letzte Änderung ...........: 09.05.2006 16:43:16 [GMT]
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Bibliothek D74H - SCM-Symbole/Bauteile |
Symbol / Bauteil |
Beschreibung / Funktion |
Gehäusezuweisung(en) |
Hersteller |
Marker |
Schaltpläne mit Symbol |
Letzte Änderung |
74h00 |
Quad 2 Input NAND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h01 |
Quad 2 Input NAND Gate TTL-Pintyp:Open Collector |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h04 |
Hex Inverter TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h05 |
Hex Inverter TTL-Pintyp:Open Collector |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h10 |
Triple 3 Input NAND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h11 |
Triple 3 Input AND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h15 |
Triple 3 Input AND Gate TTL-Pintyp:Open Collector |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h20 |
Dual 4 Input NAND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h21 |
Dual 4 Input AND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h22 |
Dual 4 Input NAND Gate TTL-Pintyp:Open Collector |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h30 |
8 Input NAND Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h40 |
Dual 4 Input NAND Buffer TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h50 |
Dual 2 Wide 2 Input AND-OR-Invert TTL-Pintyp:Totem Pole |
dil14, so14 |
- |
pin |
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09.05.2006 |
74h51 |
Dual 2 Wide 2 Input AND-OR-Invert Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h53 |
4 Wide 2 Input AND-OR-Invert Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h54 |
4 Wide 2 Input AND-OR-Invert Gate TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h60 |
Dual 4 Input Expander |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h72 |
J-K Flip-Flop, Preset + Clear TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h73 |
Dual J-K Flip-Flop, Clear TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h74 |
Dual D-Flip-Flop, Preset + Clear TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h76 |
Dual J-K Flip-Flop, Preset + Clear TTL-Pintyp:Totem Pole |
default dil16, so16 |
- |
pin |
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09.05.2006 |
74h78 |
Dual J-K Flip-Flop, Common Clear/Clock TTL-Pintyp:Totem Pole |
default dil14, so14 |
- |
pin |
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09.05.2006 |
74h160 |
BCD Decade Counter, Direct Clear TTL-Pintyp:Totem Pole |
default dil16, so16 |
- |
pin |
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09.05.2006 |
74h259 |
8 Bit Addressable Set-Reset Latch TTL-Pintyp:Totem Pole |
default dil16, so16 |
- |
pin |
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09.05.2006 |
Bibliothek D74H - SCM-Marker |
Marker |
Letzte Änderung |
junction |
21.04.1997 |
pin |
21.04.1997 |
terminal |
21.04.1997 |
Bibliothek D74H - ICs Digital, Bipolar TTL Serie 74H IEEE/DIN © 1985-2024 Oliver Bartels F+E • Aktualisiert: 09. June 2013, 08:20 [UTC]
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